Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4815003 | Structured design method for high density standard cell and macrocell layout of VLSI chips | Rathindra N. Putatunda, David C. Smith | 1989-03-21 |
| 4811237 | Structured design method for generating a mesh power bus structure in high density layout of VLSI chips | Rathindra N. Putatunda, David C. Smith | 1989-03-07 |