ST

Shuhei Tanakamaru

ST Seagate Technology: 7 patents #826 of 4,626Top 20%
CU Chuo University: 1 patents #9 of 42Top 25%
TT The University Of Tokyo: 1 patents #1,000 of 2,633Top 40%
Overall (All Time): #551,053 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11614865 Controlling SSD performance by the number of active memory dies Dana Simonson, Erich F. Haratsch 2023-03-28
11595058 Recovering from hard decoding errors by remapping log likelihood ratio values read from NAND memory cells Naveen Kumar, Erich F. Haratsch 2023-02-28
11349495 Recovering from hard decoding errors by remapping log likelihood ratio values read from NAND memory cells Naveen Kumar, Erich F. Haratsch 2022-05-31
11347394 Controlling SSD performance by the number of active memory dies Dana Simonson, Erich F. Haratsch 2022-05-31
11307806 Controlling SSD performance by queue depth Ryan James Goss, Dana Simonson, Erich F. Haratsch 2022-04-19
11132244 Block health checking Scott McClure, Erich F. Haratsch 2021-09-28
11133831 Code rate adaptation Scott McClure, Erich F. Haratsch 2021-09-28
9684464 Semiconductor storage device and control method for same Ken Takeuchi 2017-06-20
8677217 Data input / output control device and semiconductor memory device system Ken Takeuchi 2014-03-18