ST

Scott B. Tanner

CS Creative Integrated Systems: 13 patents #4 of 13Top 35%
RC Rocoh Company: 3 patents #1 of 21Top 5%
📍 Irvine, CA: #809 of 6,241 inventorsTop 15%
🗺 California: #46,935 of 386,348 inventorsTop 15%
Overall (All Time): #390,260 of 4,157,543Top 10%
13
Patents All Time

Issued Patents All Time

Showing 1–13 of 13 patents

Patent #TitleCo-InventorsDate
6002618 NMOS input receiver circuit James A. Komarek, Clarence W. Padgett, Shin-ichi Kojima, Jack L. Minney, Motohiro Oishi +2 more 1999-12-14
5870346 VLSI memory circuit James A. Komarek, Clarence W. Padgett, Shin-ichi Kojima, Jack L. Minney, Motohiro Oishi +2 more 1999-02-09
5812461 Driver circuit for addressing core memory and a method for the same James A. Komarek, Clarence W. Padgett, Robert D. Amneus 1998-09-22
5793698 Semiconductor read-only VLSI memory James A. Komarek, Clarence W. Padgett, Jack L. Minney 1998-08-11
5650979 Semiconductor read-only VLSI memory James A. Komarek, Clarence W. Padgett, Jack L. Minney 1997-07-22
5608687 Output driver control for ROM and RAM devices James A. Komarek, Clarence W. Padgett, Shin-ichi Kojima, Jack L. Minney, Motohiro Oishi +2 more 1997-03-04
5596544 Very large scale integrated planar read only memory James A. Komarek, Clarence W. Padgett, Jack L. Minney 1997-01-21
5594696 Improvemetns in a detection circuit with a level shifting circuit James A. Komarek, Clarence W. Padgett, Robert D. Amneus 1997-01-14
5581203 Semiconductor read-only VLSI memory James A. Komarek, Clarence W. Padgett, Jack L. Minney 1996-12-03
5487038 Method for read cycle interrupts in a dynamic read-only memory James A. Komarek, Clarence W. Padgett, Shin-ichi Kojima, Jack L. Minney, Motohiro Oishi +2 more 1996-01-23
5467300 Grounded memory core for Roms, Eproms, and EEpproms having an address decoder, and sense amplifier James A. Komarek, Clarence W. Padgett, Robert D. Amneus 1995-11-14
5459693 Very large scale integrated planar read only memory James A. Komarek, Clarence W. Padgett, Jack L. Minney 1995-10-17
5414663 VLSI memory with an improved sense amplifier with dummy bit lines for modeling addressable bit lines James A. Komarek, Clarence W. Padgett, Jack L. Minney 1995-05-09