Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5898478 | Method of using a test reticle to optimize alignment of integrated circuit process layers | Christopher Neville | 1999-04-27 |
| 5869395 | Simplified hole interconnect process | — | 1999-02-09 |
| 5627624 | Integrated circuit test reticle and alignment mark optimization method | Christopher Neville | 1997-05-06 |
| 5329334 | Integrated circuit test reticle and alignment mark optimization method | Christopher Neville | 1994-07-12 |