RJ

Ralph James

Micron: 17 patents #998 of 6,345Top 20%
UN Unisys: 1 patents #1,020 of 2,015Top 55%
Overall (All Time): #257,400 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9032166 Memory arbitration system and method having an arbitration packet protocol Joseph M. Jeddeloh 2015-05-12
8555006 Memory arbitration system and method having an arbitration packet protocol Joseph M. Jeddeloh 2013-10-08
8346998 System and method for transmitting data packets in a computer system having a memory hub architecture Joe M. Jeddeloh 2013-01-01
8082404 Memory arbitration system and method having an arbitration packet protocol Joseph M. Jeddeloh 2011-12-20
7949803 System and method for transmitting data packets in a computer system having a memory hub architecture Joe M. Jeddeloh 2011-05-24
7596641 System and method for transmitting data packets in a computer system having a memory hub architecture Joe M. Jeddeloh 2009-09-29
7529273 Method and system for synchronizing communications links in a hub-based memory system 2009-05-05
7461286 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 2008-12-02
7447240 Method and system for synchronizing communications links in a hub-based memory system 2008-11-04
7412571 Memory arbitration system and method having an arbitration packet protocol Joseph M. Jeddeloh 2008-08-12
7392331 System and method for transmitting data packets in a computer system having a memory hub architecture Joe M. Jeddeloh 2008-06-24
7266633 System and method for communicating the synchronization status of memory modules during initialization of the memory modules 2007-09-04
7257683 Memory arbitration system and method having an arbitration packet protocol Joseph M. Jeddeloh 2007-08-14
7251714 Method and system for capturing and bypassing memory transactions in a hub-based memory system 2007-07-31
7234070 System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding 2007-06-19
7222213 System and method for communicating the synchronization status of memory modules during initialization of the memory modules 2007-05-22
7133991 Method and system for capturing and bypassing memory transactions in a hub-based memory system 2006-11-07
4791560 Macro level control of an activity switch in a scientific vector processor which processor requires an external executive control program Archie E. Lahti, Larry L. Byers 1988-12-13