Issued Patents All Time
Showing 126–150 of 161 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6861894 | Charge pump with Fibonacci number multiplication | — | 2005-03-01 |
| 6856541 | Segmented metal bitlines | — | 2005-02-15 |
| 6845045 | Background operation for memory cells | — | 2005-01-18 |
| 6839826 | Memory device with pointer structure to map logical to physical addresses | — | 2005-01-04 |
| 6829673 | Latched address multi-chunk write to EEPROM | Douglas J. Lee, Mehrdad Mofidi, Sanjay Mehrotra | 2004-12-07 |
| 6822911 | Dynamic column block selection | — | 2004-11-23 |
| 6801454 | Voltage generation circuitry having temperature compensation | Yongliang Wang, Chi-Ming Wang | 2004-10-05 |
| 6795349 | Method and system for efficiently reading and programming of dual cell memory elements | — | 2004-09-21 |
| 6781877 | Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells | Khandker N. Quader, Yan Li, Jian Chen, Yupin Fong | 2004-08-24 |
| 6771536 | Operating techniques for reducing program and read disturbs of a non-volatile memory | Yan Li, Jian Chen | 2004-08-03 |
| 6741502 | Background operation for memory cells | — | 2004-05-25 |
| 6661708 | Non-volatile memory with improved sensing and method therefor | Rushyah Tang, Douglas J. Lee, Chi-Ming Wang, Daniel C. Guterman | 2003-12-09 |
| 6560152 | Non-volatile memory with temperature-compensated data read | — | 2003-05-06 |
| 6560146 | Dynamic column block selection | — | 2003-05-06 |
| 6552932 | Segmented metal bitlines | — | 2003-04-22 |
| 6542956 | Latched address multi-chunk write to EEPROM | Douglas J. Lee, Mehrdad Mofidi, Sanjay Mehrotra | 2003-04-01 |
| 6493269 | Dual cell reading and writing technique | — | 2002-12-10 |
| 6490200 | Non-volatile memory with improved sensing and method therefor | Rushyah Tang, Douglas J. Lee, Chi-Ming Wang, Daniel C. Guterman | 2002-12-03 |
| 6434044 | Method and system for generation and distribution of supply voltages in memory systems | Geoffrey S. Gongwer, Kevin M. Conley, Chi-Ming Wang, Yong Wang | 2002-08-13 |
| 6282120 | Non-volatile memory with improved sensing and method therefor | Rushyah Tang, Douglas J. Lee, Chi-Ming Wang, Daniel C. Guterman | 2001-08-28 |
| 6282130 | EEPROM memory chip with multiple use pinouts | Khandker N. Quader, Sanjay Mehrotra | 2001-08-28 |
| 6157983 | Concurrent write of multiple chunks of data into multiple subarrays of flash EEPROM | Douglas J. Lee, Mehrdad Mofidi, Sanjay Mehrotra | 2000-12-05 |
| 6091633 | Memory array architecture utilizing global bit lines shared by multiple cells | George Samachisa | 2000-07-18 |
| 6044019 | Non-volatile memory with improved sensing and method therefor | Rushyah Tang, Douglas J. Lee, Chi-Ming Wang, Daniel C. Guterman | 2000-03-28 |
| 5890192 | Concurrent write of multiple chunks of data into multiple subarrays of flash EEPROM | Douglas J. Lee, Mehrdad Mofidi, Sanjay Mehrotra | 1999-03-30 |