Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11977407 | Glitch-free synchronization and SYSREF windowing and generation scheme | Apoorva Bhatia, Pranav Kumar, Abhrarup Barman Roy, Raghavendra Reddy | 2024-05-07 |
| 10439620 | Dual-PFD feedback delay generation circuit | Theertham Srinivas, Jagdish Chand Goyal | 2019-10-08 |
| 10243573 | Phase syncronizing PLL output across reference and VCO clock domains | Jagdish Chand Goyal, Shankaranarayana Karantha, Ashwin Ravisankar, Srikanth Manian, Srinivas Theertham | 2019-03-26 |
| 9503105 | Phase frequency detector (PFD) circuit with improved lock time | Jagdish Chand Goyal, Sankaran Aniruddhan | 2016-11-22 |