Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12432105 | PAPR reduction for correlated CDM groups | Peter Pawliuk, Seunghee Han, Byungho Park | 2025-09-30 |
| 10886878 | Modulation circuitry with N.5 division | Georgios Palaskas, Dirk Friedrich | 2021-01-05 |
| 10230520 | Direct digital frequency generation using time and amplitude | Hasnain Lakdawala, Ashoke Ravi, Ofir Degani, Bernd-Ulrich Klepser, Zdravko Boos +2 more | 2019-03-12 |
| 10177774 | Digital time converter systems and methods | Georgios Palaskas, Peter Preyler, Rotem Banin | 2019-01-08 |
| 9847676 | Power saving technique for digital to time converters | Georgios Palaskas, Bernd-Ulrich Klepser, Andreas Menkhoff, Zdravko Boos, Andreas Boehme +1 more | 2017-12-19 |
| 9660798 | Direct digital frequency generation using time and amplitude | Hasnain Lakdawala, Ashoke Ravi, Ofir Degani, Bernd-Ulrich Klepser, Zdravko Boos +2 more | 2017-05-23 |
| 9641185 | Digital time converter systems and method | Georgios Palaskas, Peter Preyler, Rotem Banin | 2017-05-02 |
| 9438265 | Phase multiplexer | Stefano Pellerano | 2016-09-06 |
| 9288841 | Direct digital frequency generation using time and amplitude | Hasnain Lakdawala, Ashoke Ravi, Ofir Degani, Bernd-Ulrich Klepser, Zdravko Boos +2 more | 2016-03-15 |
| 9209958 | Segmented digital-to-time converter calibration | Georgios Palaskas, Stefano Pellerano, Ashoke Ravi, Kailash Chandrashekar | 2015-12-08 |
| 9130588 | Redundant delay digital-to-time converter | Stephan Henzler, Markus Schimper, Stefano Pellerano, Kailash Chandrashekar | 2015-09-08 |
| 9054925 | Parallel digital-to-time converter architecture | Stefano Pellerano | 2015-06-09 |
| 8598930 | Digital delay-locked loop with drift sensor | Stefano Pellerano | 2013-12-03 |
| 8390349 | Sub-picosecond resolution segmented re-circulating stochastic time-to-digital converter | Ashoke Ravi, Ofir Degani, Hyung Seok Kim, Hasnain Lakdawala, Yee W. Li | 2013-03-05 |
| 8222966 | System, method and apparatus for an open loop calibrated phase wrapping phase modulator for wideband RF outphasing/polar transmitters | Ashoke Ravi, Marian Verhelst, Georgios Palaskas | 2012-07-17 |
| 8207770 | Digital phase lock loop | Ashoke Ravi, Pin-En Su, Georgios Palaskas | 2012-06-26 |
| 8198929 | Dynamic element matching for time-to-digital converters | Stefano Pellerano, Ashoke Ravi | 2012-06-12 |
| 7786914 | Time-interleaved delta-sigma modulator | Ashoke Ravi | 2010-08-31 |
| 7782104 | Delay element array for time-to-digital converters | Stefano Pellerano | 2010-08-24 |