Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6442641 | Handling multiple delayed write transactions simultaneously through a bridge | James Bury, Jeffrey J. McCoskey | 2002-08-27 |
| 6298407 | Trigger points for performance optimization in bus-to-bus bridges | Barry R. Davis | 2001-10-02 |
| 6260096 | Read latency across a bridge | Bineet Thaker | 2001-07-10 |
| 6230228 | Efficient bridge architecture for handling multiple write transactions simultaneously | Bryan R. White | 2001-05-08 |
| 6067629 | Apparatus and method for pseudo-synchronous communication between clocks of different frequencies | Joseph Murray, Jeff J. McCoskey | 2000-05-23 |
| 5884027 | Architecture for an I/O processor that integrates a PCI to PCI bridge | Elliot Garbus, Peter Sankhagowit, Marc A. Goldschmidt | 1999-03-16 |
| 5828825 | Method and apparatus for pseudo-direct access to embedded memories of a micro-controller integrated circuit via the IEEE test access port | David Sprague | 1998-10-27 |
| 5515530 | Method and apparatus for asynchronous, bi-directional communication between first and second logic elements having a fixed priority arbitrator | — | 1996-05-07 |