MH

Mark Steven Hahn

CS Cadence Design Systems: 8 patents #167 of 2,263Top 8%
📍 Milpitas, CA: #628 of 3,192 inventorsTop 20%
🗺 California: #73,997 of 386,348 inventorsTop 20%
Overall (All Time): #651,948 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
8453136 Change tracking and incremental synchronization of EDA design and technology data Arnold Ginetti 2013-05-28
8453091 Method and mechanism for managing hierarchical data for implementing region query Guruprasad Rao, Laurent Volpe 2013-05-28
8413087 Method and mechanism for implementing region query using hierarchical grids Guruprasad Rao, Laurent Volpe 2013-04-02
8413093 Method and mechanism for performing region query using hierarchical grids Guruprasad Rao, Laurent Volpe 2013-04-02
8407228 Method and mechanism for maintaining existence information for electronic layout data Laurent Volpe, Guruprasad Rao 2013-03-26
7188327 Method and system for logic-level circuit modeling 2007-03-06
6622290 Timing verification method employing dynamic abstraction in core/shell partitioning Arnold Ginetti, Harish Kriplani, Naser Awad 2003-09-16
6263478 System and method for generating and using stage-based constraints for timing-driven design Jimmy Lam, Limin He, Chris Morrison 2001-07-17