Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7326860 | Routing vias in a substrate from bypass capacitor pads | Jerimy Nelson, Peter Moldauer, Gary Taylor, David Quint | 2008-02-05 |
| 7327583 | Routing power and ground vias in a substrate | Jerimy Nelson, Peter Moldauer, Karl J. Bois | 2008-02-05 |
| 7272806 | System and method for evaluating power and ground vias in a package design | Jerimy Nelson, Nathan Bertrand | 2007-09-18 |
| 7143389 | Systems and methods for generating node level bypass capacitor models | Yong Wang, Jerimy Nelson | 2006-11-28 |
| 7143022 | System and method for integrating subcircuit models in an integrated power grid analysis environment | Yong Wang, Jerimy Nelson | 2006-11-28 |
| 7137088 | System and method for determining signal coupling coefficients for lines | Jerimy Nelson, Kari Bois | 2006-11-14 |
| 7117464 | System and method for evaluating signal coupling between differential traces in a package design | Jerimy Nelson, Peter Modauer | 2006-10-03 |
| 7078812 | Routing differential signal lines in a substrate | Jerimy Nelson, Peter Moldauer | 2006-07-18 |
| 7075185 | Routing vias in a substrate from bypass capacitor pads | Jerimy Nelson, Peter Moldauer, Gary Taylor, David Quint | 2006-07-11 |
| 7069095 | System and method for populating a computer-aided design program's database with design parameters | Jerimy Nelson, Karl J. Bois | 2006-06-27 |
| 7055124 | System and method for evaluating signal deviations in a package design | Jerimy Nelson, David Quint | 2006-05-30 |
| 6983434 | Differential via pair impedance adjustment tool | Jerimy Nelson, Karl J. Bois | 2006-01-03 |
| 6983433 | Differential line pair impedance adjustment tool | Jerimy Nelson, Karl J. Bois | 2006-01-03 |
| 6976233 | Signal via impedance verification tool | Jerimy Nelson, Karl J. Bois | 2005-12-13 |
| 6971077 | Signal line impedance adjustment tool | Jerimy Nelson, Karl J. Bois | 2005-11-29 |
| 6968522 | Differential line pair impedance verification tool | Jerimy Nelson, Karl J. Bois | 2005-11-22 |
| 6938230 | System and method for evaluating signal trace discontinuities in a package design | Jerimy Nelson, David Quint | 2005-08-30 |
| 6922822 | Verifying proximity of ground vias to signal vias in an integrated circuit | Jerimy Nelson, Peter Moldauer | 2005-07-26 |
| 6907589 | System and method for evaluating vias per pad in a package design | Jerimy Nelson, Nathan Bertrand | 2005-06-14 |
| 6889367 | Differential via pair impedance verification tool | Jerimy Nelson, Karl J. Bois | 2005-05-03 |
| 6859915 | Signal line impedance verification tool | Jerimy Nelson, Karl J. Bois | 2005-02-22 |
| 6845492 | Signal via impedance adjustment tool | Jerimy Nelson, Karl J. Bois | 2005-01-18 |
| 6807657 | Inter-signal proximity verification in an integrated circuit | Jerimy Nelson, Peter Moldauer | 2004-10-19 |
| 6769102 | Verifying proximity of ground metal to signal traces in an integrated circuit | Jerimy Nelson, Peter Moldauer | 2004-07-27 |
| 6711730 | Synthesizing signal net information from multiple integrated circuit package models | William B. McHardy, Peter Moldauer | 2004-03-23 |