LE

Lawrence B. Edwards

VT Vlsi Technology: 5 patents #103 of 594Top 20%
Overall (All Time): #1,053,810 of 4,157,543Top 30%
5
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
5689433 Method and apparatus for compacting integrated circuits with wire length minimization 1997-11-18
5625568 Method and apparatus for compacting integrated circuits with standard cell architectures Andy T. Ngo 1997-04-29
5612893 Method and apparatus for compacting integrataed circuits with transistor sizing Ling Hao 1997-03-18
5515293 Method and apparatus for generating a linked data structure for integrated circuit layout 1996-05-07
5416722 System and method for compacting integrated circuit layouts 1995-05-16