KK

Koji Kanno

NE Nec: 3 patents #4,195 of 14,502Top 30%
SC Shin-Etsu Handotai Co.: 1 patents #385 of 679Top 60%
📍 Shirakawa, JP: #31 of 93 inventorsTop 35%
Overall (All Time): #1,210,305 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
8984456 Macro timing analysis device, macro boundary path timing analysis method and macro boundary path timing analysis program 2015-03-17
8788255 Delay analysis processing of semiconductor integrated circuit 2014-07-22
8171440 Timing analyzing apparatus, timing analyzing method and program thereof 2012-05-01
5215620 Method for pulling a silicon single crystal by imposing a periodic rotation rate on a constant rotation rate Yoshihiro Kodama, Tetsuya Ishidaira, Shin-ichi Furuse 1993-06-01