JT

John Edward Tanner

TR Tanner Research: 2 patents #3 of 6Top 50%
Overall (All Time): #2,212,603 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6373122 Method of fabricating various-sized passivated integrated circuit chips from a borderless gate array Massimo A. Sivilotti, Jin Luo 2002-04-16
6316334 Method of fabricating various-sized passivated integrated circuit chips from a borderless gate array Massimo A. Sivilotti, Jin Luo 2001-11-13