JR

John Rhoades

RA Rambus: 11 patents #144 of 549Top 30%
CL Clearspeed Technology Limited: 3 patents #1 of 21Top 5%
CP Clearspeed Technology Plc: 3 patents #4 of 15Top 30%
Overall (All Time): #257,868 of 4,157,543Top 7%
18
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8762691 Memory access consolidation for SIMD processing elements using transaction identifiers Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2014-06-24
8200686 Lookup engine 2012-06-12
8174530 Parallel date processing apparatus Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2012-05-08
8169440 Parallel data processing apparatus Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2012-05-01
8171263 Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2012-05-01
8127112 SIMD array operable to process different respective packet protocols simultaneously while executing a single common instruction stream Ken Cameron, Paul Winser, Ray McConnell, Gordon Faulds, Simon McIntosh-Smith +5 more 2012-02-28
7966475 Parallel data processing apparatus Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2011-06-21
7958332 Parallel data processing apparatus Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2011-06-07
7925861 Plural SIMD arrays processing threads fetched in parallel and prioritized by thread manager sequentially transferring instructions to array controller for distribution Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2011-04-12
7917727 Data processing architectures for packet handling using a SIMD array Ken Cameron, Paul Winser, Ray McConnell, Gordon Faulds, Simon McIntosh-Smith +5 more 2011-03-29
7856543 Data processing architectures for packet handling wherein batches of data packets of unpredictable size are distributed across processing elements arranged in a SIMD array operable to process different respective packet protocols at once while executing a single common instruction stream Ken Cameron, Paul Winser, Ray McConnell, Gordon Faulds, Simon McIntosh-Smith +5 more 2010-12-21
7818541 Data processing architectures Ken Cameron, Paul Winser, Ray McConnell, Gordon Faulds, Simon McIntosh-Smith +5 more 2010-10-19
7802079 Parallel data processing apparatus Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2010-09-21
7627736 Thread manager to control an array of processing elements Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2009-12-01
7526630 Parallel data processing apparatus Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2009-04-28
7506136 Parallel data processing apparatus Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2009-03-17
7363472 Memory access consolidation for SIMD processing elements having access indicators Dave Stuttard, Dave Williams, Eamon O'Dea, Gordon Faulds, Ken Cameron +6 more 2008-04-22
6173372 Parallel processing of data matrices 2001-01-09