JB

Jon A. Batcheller

QS Quickturn Design Systems: 9 patents #5 of 71Top 8%
MG Mentor Graphics: 1 patents #345 of 698Top 50%
Overall (All Time): #526,528 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6002861 Method for performing simulation using a hardware emulation system Michael Butts 1999-12-14
5812414 Method for performing simulation using a hardware logic emulation system Michael Butts 1998-09-22
5796623 Apparatus and method for performing computations with electrically reconfigurable logic devices Michael Butts 1998-08-18
5734581 Method for implementing tri-state nets in a logic emulation system Michael Butts 1998-03-31
5661662 Structures and methods for adding stimulus and response functions to a circuit design undergoing emulation Michael Butts 1997-08-26
5657241 Routing methods for use in a logic emulation system Michael Butts 1997-08-12
5612891 Hardware logic emulation system with memory capability Michael Butts 1997-03-18
5452231 Hierarchically connected reconfigurable logic assembly Michael Butts 1995-09-19
5448496 Partial crossbar interconnect architecture for reconfigurably connecting multiple reprogrammable logic devices in a logic emulation system Michael Butts 1995-09-05
5036473 Method of using electronically reconfigurable logic circuits Michael Butts 1991-07-30