Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12205661 | Memory device and memory system including the same | Sung-Rae Kim, Myung-Kyu Lee, Ki-Jun Lee, Jun Jin Kong, Yeong Geol Song | 2025-01-21 |
| 12176919 | Error correction code circuit, memory device including error correction code circuit, and operation method of error correction code circuit | Sung-Rae Kim, Kijun Lee, Myungkyu Lee, Sunghye Cho, Isak Hwang | 2024-12-24 |
| 12040046 | Operating method of memory device for extending synchronization of data clock signal, and operating method of electronic device including the same | Kyungryun Kim, Young Ju Kim, Seung-Jun Lee, Youngbin Lee, Yeonkyu Choi | 2024-07-16 |
| 12020767 | Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device | Dae-Sik Moon, Kyung-Soo Ha, Young-Soo Sohn, Ki-Seok Oh, Chang-Kyo Lee +2 more | 2024-06-25 |
| 11783880 | Operating method of memory device for extending synchronization of data clock signal, and operating method of electronic device including the same | Kyungryun Kim, Young Ju Kim, Seung-Jun Lee, Youngbin Lee, Yeonkyu Choi | 2023-10-10 |
| 11551776 | Memory device and memory system including the same | Sung-Rae Kim, Myung-Kyu Lee, Ki-Jun Lee, Jun Jin Kong, Yeong Geol Song | 2023-01-10 |
| 11211102 | Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device | Dae-Sik Moon, Kyung-Soo Ha, Young-Soo Sohn, Ki-Seok Oh, Chang-Kyo Lee +2 more | 2021-12-28 |
| 10885950 | Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device | Dae-Sik Moon, Kyung-Soo Ha, Young-Soo Sohn, Ki-Seok Oh, Chang-Kyo Lee +2 more | 2021-01-05 |
| 10607660 | Nonvolatile memory device and operating method of the same | Young-Hwa Kim, Tae Young Oh, Seok-Jin Cho | 2020-03-31 |