Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| RE42551 | Block locking apparatus for flash memory | Vishram Prakash Dalvi, Rodney R. Rozman, Christopher John Haid, Joseph W. Tsang, Jeff Evertt +2 more | 2011-07-12 |
| 7437499 | Dividing a flash memory operation into phases | Richard J. Durante | 2008-10-14 |
| 7200708 | Apparatus and methods for storing data which self-compensate for erase performance degradation | — | 2007-04-03 |
| 6597605 | Systems with non-volatile memory bit sequence program control | Rodney R. Rozman | 2003-07-22 |
| 6418059 | Method and apparatus for non-volatile memory bit sequence program controller | Rodney R. Rozman | 2002-07-09 |
| 6148360 | Nonvolatile writeable memory with program suspend command | David A. Leak, Fasil G. Bekele, Thomas C. Price, Alan E. Baker, Charles W. Brown +4 more | 2000-11-14 |
| 6073243 | Block locking and passcode scheme for flash memory | Vishram Prakash Dalvi, Rodney R. Rozman, Christopher John Haid, Joseph W. Tsang, Jeff Evertt +2 more | 2000-06-06 |
| 6035401 | Block locking apparatus for flash memory | Vishram Prakash Dalvi, Rodney R. Rozman, Christopher John Haid, Joseph W. Tsang, Jeff Evertt +2 more | 2000-03-07 |
| 5954818 | Method of programming, erasing, and reading block lock-bits and a master lock-bit in a flash memory device | Vishram Prakash Dalvi, Rodney R. Rozman, Christopher John Haid, Joseph W. Tsang, Jeff Evertt +2 more | 1999-09-21 |
| 5937424 | Method and apparatus for suspending the writing of a nonvolatile semiconductor memory with program suspend command | David A. Leak, Fasil G. Bekele, Thomas C. Price, Alan E. Baker, Charles W. Brown +4 more | 1999-08-10 |
| 5850509 | Circuitry for propagating test mode signals associated with a memory array | Mickey L. Fandrich, Virgil N. Kynett | 1998-12-15 |
| 5526311 | Method and circuitry for enabling and permanently disabling test mode access in a flash memory device | Richard J. Durante, Alexander C. Mitchell, III | 1996-06-11 |
| 5459355 | Multiple layer programmable layout for version identification | — | 1995-10-17 |
| 5412793 | Method for testing erase characteristics of a flash memory array | Mickey L. Fandrich, William D. Smith | 1995-05-02 |
| 5410544 | External tester control for flash memory | Mamun Ur Rashid, Rodney R. Rozman, Richard J. Durante | 1995-04-25 |
| 5369647 | Circuitry and method for testing a write state machine | Mickey L. Fandrich | 1994-11-29 |
| 5339320 | Architecture of circuitry for generating test mode signals | Mickey L. Fandrich, Virgil N. Kynett | 1994-08-16 |
| 5222046 | Processor controlled command port architecture for flash memory | Alan E. Baker, George P. Hoekstra, Virgil N. Kynett, Steven Wells, Mark Winston | 1993-06-22 |
| 5053990 | Program/erase selection for flash memory | Alan E. Baker, George P. Hoekstra, Virgil N. Kynett, Steven Wells, Mark Winston | 1991-10-01 |
| 4860261 | Leakage verification for flash EPROM | George P. Hoekstra | 1989-08-22 |
| 4841482 | Leakage verification for flash EPROM | George P. Hoekstra | 1989-06-20 |