Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6246704 | Automatic on-chip clock tuning methodology and circuitry | — | 2001-06-12 |
| 6028465 | ESD protection circuits | — | 2000-02-22 |
| 6025746 | ESD protection circuits | — | 2000-02-15 |
| 5939934 | Integrated circuit passively biasing transistor effective threshold voltage and related methods | Tsiu C. Chan | 1999-08-17 |
| 5883844 | Method of stress testing integrated circuit having memory and integrated circuit having stress tester for memory thereof | — | 1999-03-16 |
| 5883544 | Integrated circuit actively biasing the threshold voltage of transistors and related methods | Tsiu C. Chan | 1999-03-16 |
| 5834966 | Integrated circuit sensing and digitally biasing the threshold voltage of transistors and related methods | Tsiu C. Chan | 1998-11-10 |
| 5831446 | Process monitor test chip and methodology | Tam Le, Milind Asnani | 1998-11-03 |