Issued Patents All Time
Showing 25 most recent of 99 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12259829 | Memory having internal processors and data communication methods in memory | Robert M. Walker, Dan Skinner, Todd A. Merritt | 2025-03-25 |
| 12067767 | Buses for pattern-recognition processors | — | 2024-08-20 |
| 11914530 | Memory having internal processors and data communication methods in memory | Robert M. Walker, Dan Skinner, Todd A. Merritt | 2024-02-27 |
| 11625321 | Apparatuses and methods for memory address translation during block migration using depth mapping table based on mapping state | David A. Roberts, Robert M. Walker | 2023-04-11 |
| 11531472 | Scalable memory system protocol supporting programmable number of levels of indirection | — | 2022-12-20 |
| 11526280 | Scalable memory system protocol supporting programmable number of levels of indirection | — | 2022-12-13 |
| 11461019 | Systems and methods for packing data in a scalable memory system protocol | — | 2022-10-04 |
| 11461017 | Systems and methods for improving efficiencies of a memory system | — | 2022-10-04 |
| 11403240 | Memory having internal processors and data communication methods in memory | Robert M. Walker, Dan Skinner, Todd A. Merritt | 2022-08-02 |
| 11256570 | Progressive length error control code | — | 2022-02-22 |
| 11194480 | Systems and methods for packing data in a scalable memory system protocol | — | 2021-12-07 |
| 11023758 | Buses for pattern-recognition processors | — | 2021-06-01 |
| 11003363 | Scalable memory system protocol supporting programmable number of levels of indirection | — | 2021-05-11 |
| 10921995 | Systems and methods for packing data in a scalable memory system protocol | — | 2021-02-16 |
| 10838813 | Progressive length error control code | — | 2020-11-17 |
| 10817412 | Methods for migrating information stored in memory using an intermediate depth map | David A. Roberts, Robert M. Walker | 2020-10-27 |
| 10733050 | Progressive length error control code | — | 2020-08-04 |
| 10572164 | Systems and methods for improving efficiencies of a memory system | — | 2020-02-25 |
| 10540104 | Systems and methods for packing data in a scalable memory system protocol | — | 2020-01-21 |
| 10496478 | Progressive length error control code | — | 2019-12-03 |
| 10409680 | Progressive length error control code | — | 2019-09-10 |
| 10152113 | Dynamic power-down of a block of a pattern-recognition processor | — | 2018-12-11 |
| 10146457 | Systems and methods for reordering packet transmissions in a scalable memory system protocol | — | 2018-12-04 |
| 10127969 | Memory device command receiving and decoding methods | Scott E. Smith, Duc Ho | 2018-11-13 |
| 10042750 | Apparatuses and methods for adaptive control of memory using an adaptive memory controller with a memory management hypervisor | David A. Roberts, Robert M. Walker | 2018-08-07 |