ID

Ian Edward Davis

FN Foundry Networks: 11 patents #11 of 112Top 10%
AI A10 Networks, Incorporated: 7 patents #17 of 71Top 25%
NS National Semiconductor: 4 patents #498 of 2,238Top 25%
CA Ca: 1 patents #669 of 1,424Top 50%
LI Landis+Gyr Innovations: 1 patents #84 of 137Top 65%
Overall (All Time): #172,771 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11169713 Restricting write cycles to extend the lifetime of nonvolatile memory Chad Wolter, August Schack 2021-11-09
10348631 Processing packet header with hardware assistance Gurudeep Kamat, Rajkumar Jalan 2019-07-09
10222959 Visual modification and training of an anomaly detection image Serguei Mankovskii, Michael Godfrey 2019-03-05
10069946 Hardware-based packet editor 2018-09-04
9843521 Processing packet header with hardware assistance Gurudeep Kamat, Rajkumar Jalan 2017-12-12
9742879 Hardware-based packet editor 2017-08-22
9596286 Method to process HTTP header with hardware assistance Gurudeep Kamat, Rajkumar Jalan 2017-03-14
9118618 Hardware-based packet editor 2015-08-25
9118620 Hardware-based packet editor 2015-08-25
8989202 Pipeline method and system for switching packets Aris Wong 2015-03-24
8671219 Method and apparatus for efficiently processing data packets in a computer network 2014-03-11
8194666 Flexible method for processing data packets in a network routing system for enhanced efficiency and monitoring capability 2012-06-05
8170044 Pipeline method and system for switching packets Aris Wong 2012-05-01
7830884 Flexible method for processing data packets in a network routing system for enhanced efficiency and monitoring capability 2010-11-09
7813367 Pipeline method and system for switching packets Aris Wong 2010-10-12
7738450 System architecture for very fast ethernet blade 2010-06-15
7649885 Network routing system for enhanced efficiency and monitoring capability Jeffrey Prince, Ronak Patel 2010-01-19
7468975 Flexible method for processing data packets in a network routing system for enhanced efficiency and monitoring capability 2008-12-23
7266117 System architecture for very fast ethernet blade 2007-09-04
7187687 Pipeline method and system for switching packets Aris Wong 2007-03-06
5901322 Method and apparatus for dynamic control of clocks in a multiple clock processor, particularly for a data cache Joseph Herbst 1999-05-04
5781766 Programmable compensating device to optimize performance in a DRAM controller chipset 1998-07-14
5708791 System and method for detecting the DRAM architecture in a computer 1998-01-13
5668982 System and method for using a half-clock module to implement computer timing control circuitry 1997-09-16