| 7945433 |
Hardware simulation accelerator design and method that exploits a parallel structure of user models to support a larger user model size |
Daniel Crouse, Gernot E. Guenther, Viktor Gyuris, Kevin Anthony Pasnik, Thomas J. Tryt +1 more |
2011-05-17 |
| 7769577 |
Hardware accelerator with a single partition for latches and combinational logic |
Gernot E. Guenther, Viktor Gyuris, Kevin Anthony Pasnik, John Henry Westerman, Jr. |
2010-08-03 |
| 7290228 |
Hardware accelerator with a single partition for latches and combinational logic |
Gernot E. Guenther, Viktor Gyuris, Kevin Anthony Pasnik, John Henry Westermann, Jr. |
2007-10-30 |
| 6898562 |
Method and system for efficiently overriding net values in a logic simulator machine |
— |
2005-05-24 |
| 6847927 |
Efficient array tracing in a logic simulator machine |
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2005-01-25 |
| 6829572 |
Method and system for efficiently overriding array net values in a logic simulator machine |
Daniel Crouse |
2004-12-07 |
| 5414858 |
System and method for dynamically varying between interrupt and polling to service requests of computer peripherals |
Mark Sweet |
1995-05-09 |
| 5001624 |
Processor controlled DMA controller for transferring instruction and data from memory to coprocessor |
Scott Smith, John Voltin, Charles Wright |
1991-03-19 |
| 4817037 |
Data processing system with overlap bus cycle operations |
Charles Wright |
1989-03-28 |
