| 6532533 |
Input/output system with mask register bit control of memory mapped access to individual input/output pins |
Amarjit S. Bhandal, Richard Simpson |
2003-03-11 |
| 6189077 |
Two computer access circuit using address translation into common register file |
Iain Robertson, Jeffrey L. Nye, Michael D. Asal, Richard Simpson, James G. Littleton |
2001-02-13 |
| 6154824 |
Multifunctional access devices, systems and methods |
Iain Robertson, Jeffrey L. Nye, Michael D. Asal, Richard Simpson, James G. Littleton |
2000-11-28 |
| 5696923 |
Graphics processor writing to shadow register at predetermined address simultaneously with writing to control register |
Iain Robertson, Jeffrey L. Nye, Michael D. Asal, Richard Simpson, James G. Littleton |
1997-12-09 |
| 5696924 |
Memory access circuit with address translation performing auto increment of translated address on writes and return to translated address on reads |
Iain Robertson, Jeffrey L. Nye, Michael D. Asal, Richard Simpson, James G. Littleton |
1997-12-09 |
| 5636335 |
Graphics computer system having a second palette shadowing data in a first palette |
Iain Robertson, Jeffrey L. Nye, Michael D. Asal, Richard Simpson, James G. Littleton |
1997-06-03 |
| 5546553 |
Multifunctional access devices, systems and methods |
Iain Robertson, Jeffrey L. Nye, Michael D. Asal, Richard Simpson, James G. Littleton |
1996-08-13 |
| 5269021 |
Multiprocessor software interface for a graphics processor subsystem employing partially linked dynamic load modules which are downloaded and fully linked at run time |
Michael A. Denio, William S. Egr, Douglas C. Crawford, Michael D. Asal, James G. Littleton +1 more |
1993-12-07 |