| 6091619 |
Array architecture for long record length fast-in slow-out (FISO) analog memory |
— |
2000-07-18 |
| 5942927 |
Clock signal generator for a logic analyzer controlled to lock both edges to a reference clock signal |
Eric P. Etheridge, David J. McKinney, Spiro Sassalos |
1999-08-24 |
| 5557618 |
Signal sampling circuit with redundancy |
Boulden G. Griffith |
1996-09-17 |
| 5352933 |
High speed sample and hold signal generator |
— |
1994-10-04 |
| 5321656 |
CMOS-based peak detector for fast-in, slow-out min/max detection |
— |
1994-06-14 |
| 5298902 |
Analog-to-digital converter employing multiple parallel switching capacitor circuits |
— |
1994-03-29 |
| 5200983 |
Fiso analog signal acquisition system employing CCD array storage |
— |
1993-04-06 |
| 5144525 |
Analog acquisition system including a high speed timing generator |
Charles L. Saxe, Steven K. Sullivan |
1992-09-01 |
| 5051630 |
Accurate delay generator having a compensation feature for power supply voltage and semiconductor process variations |
David J. McKinney |
1991-09-24 |
| 4897816 |
Serial dynamic memory shift register |
— |
1990-01-30 |
| 4809051 |
Vertical punch-through cell |
— |
1989-02-28 |
| 4805152 |
Refresh cell for a random access memory |
— |
1989-02-14 |
| 4736153 |
Voltage sustainer for above V.sub.CC level signals |
— |
1988-04-05 |
| 4736154 |
Voltage regulator based on punch-through sensor |
— |
1988-04-05 |
