Issued Patents All Time
Showing 25 most recent of 51 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10924483 | Packet validation in virtual network interface architecture | Steven L. Pope, David J. Riddoch, Derek Roberts | 2021-02-16 |
| 9912665 | Packet validation in virtual network interface architecture | Steve L. Pope, David J. Riddoch, Derek Roberts | 2018-03-06 |
| 9594842 | Hashing algorithm for network receive filtering | Steven L. Pope, Derek Roberts, David J. Riddoch, John Mingyung Chiang, Der-Ren Chu | 2017-03-14 |
| 8959095 | Hashing algorithm for network receive filtering | Steve L. Pope, Derek Roberts, David J. Riddoch, John Mingyung Chiang, Der-Ren Chu | 2015-02-17 |
| 8380882 | Packet validation in virtual network interface architecture | Steve L. Pope, David J. Riddoch, Derek Roberts | 2013-02-19 |
| 8131895 | Interrupt management for multiple event queues | Steven L. Pope, David J. Riddoch, Derek Roberts | 2012-03-06 |
| 7984180 | Hashing algorithm for network receive filtering | Steve L. Pope, Derek Roberts, David J. Riddoch, John Mingyung Chiang, Der-Ren Chu | 2011-07-19 |
| 7831749 | Including descriptor queue empty events in completion events | Steve L. Pope, David J. Riddoch, Derek Roberts | 2010-11-09 |
| 7769923 | Interrupt management for multiple event queues | Steve L. Pope, David J. Riddoch, Derek Roberts | 2010-08-03 |
| 7634584 | Packet validation in virtual network interface architecture | Steve L. Pope, David J. Riddoch, Derek Roberts | 2009-12-15 |
| 7610413 | Queue depth management for communication between host and peripheral device | Steve L. Pope, David J. Riddoch, Derek Roberts | 2009-10-27 |
| 7596644 | Transmit rate pacing system and method | David J. Riddoch, Steve L. Pope, John Mingyung Chiang, Alok Singh, Derek Roberts | 2009-09-29 |
| 7562366 | Transmit completion event batching | Steve L. Pope, David J. Riddoch, Derek Roberts, John Mingyung Chiang | 2009-07-14 |
| 7496699 | DMA descriptor queue read and cache write pointer arrangement | Steve L. Pope, Derek Roberts, David J. Riddoch, John Mingyung Chiang, Der-Ren Chu | 2009-02-24 |
| 7031305 | Apparatus and method for programmable memory access slot assignment | Xiaohua Zhuang, Bahadir Erimli, John M. Chiang, Shashank Merchant, Robert Alan Williams +5 more | 2006-04-18 |
| 6904043 | Apparatus and methods for storing and processing header information in a network switch | Shashank Merchant | 2005-06-07 |
| 6769055 | Two-part memory address generator | Eric Tsin-Ho Leung | 2004-07-27 |
| 6732184 | Address table overflow management in a network switch | Shashank Merchant | 2004-05-04 |
| 6731601 | Apparatus and method for resetting a retry counter in a network switch port in response to exerting backpressure | Gopal Krishna, Peter Ka-Fai Chow, Jenny Liu Fischer, Bahadir Erimli | 2004-05-04 |
| 6725270 | Apparatus and method for programmably modifying a limit of a retry counter in a network switch port in response to exerting backpressure | Bahadir Erimli, Jenny Liu Fischer, Peter Ka-Fai Chow | 2004-04-20 |
| 6721277 | Generic register interface for accessing registers located in different clock domains | Jeffrey Dwork, John M. Chiang | 2004-04-13 |
| 6651172 | Multi-phase EEPROM reading for network interface initialization | Jeffrey Dwork, John M. Chiang, Hung Duy Vo | 2003-11-18 |
| 6625146 | Method and apparatus for operating a network switch in a CPU-less environment | Shashank Merchant, Robert Alan Williams | 2003-09-23 |
| 6563790 | Apparatus and method for modifying a limit of a retry counter in a network switch port in response to exerting backpressure | Bahadir Erimli, Jenny Liu Fischer, Peter Ka-Fai Chow | 2003-05-13 |
| 6546010 | Bandwidth efficiency in cascaded scheme | Shashank Merchant, Robert Alan Williams | 2003-04-08 |