Issued Patents All Time
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7656971 | Adjustable phase controlled clock and data recovery circuit | Anthony R. Bonaccio, Troy A. Seman | 2010-02-02 |
| 7453296 | Delay locked loop having charge pump gain independent of operating frequency | — | 2008-11-18 |
| 7301380 | Delay locked loop having charge pump gain independent of operating frequency | — | 2007-11-27 |
| 7272196 | Adjustable phase controlled clock and data recovery circuit | Anthony R. Bonaccio, Troy A. Seman | 2007-09-18 |
| 7248838 | Wireless communication system within a system on a chip | Kenneth J. Goodnow, Riyon Harding, Jason M. Norman, Sebastian T. Ventrone | 2007-07-24 |
| 7103320 | Wireless communication system within a system on a chip | Kenneth J. Goodnow, Riyon Harding, Jason M. Norman, Sebastian T. Ventrone | 2006-09-05 |
| 7088190 | Voltage-controlled oscillators having controlling circuits | John S. Austin, Melissa A. Beacom | 2006-08-08 |
| 6954088 | Voltage controlled oscillator (VCO) with amplitude control | — | 2005-10-11 |
| 6614316 | Fractional integration and proportional multiplier control to achieve desired loop dynamics | Anthony J. Perri, Troy A. Seman | 2003-09-02 |
| 6603416 | Method and circuit for dynamic calibration of flash analog to digital converters | Chad Mitchell, Steven Tanghe, Sharon L. Von Bruns | 2003-08-05 |
| 6563388 | Timing loop bandwidth tracking data rate | Troy A. Seman | 2003-05-13 |
| 6525615 | Oscillator with digitally variable phase for a phase-locked loop | Troy A. Seman | 2003-02-25 |
| 6504499 | Analog-to-digital converter having positively biased differential reference inputs | Sharon L. Von Bruns | 2003-01-07 |
| 6198339 | CVF current reference with standby mode | John E. Gersbach | 2001-03-06 |
| 6185057 | Method and apparatus for increasing the speed of write driver circuitry | — | 2001-02-06 |
| 6011423 | Virtual voltage power supply | Arnold E. Baizley, Anthony R. Bonaccio, Steven Tanghe | 2000-01-04 |
| 5929791 | Match detect logic for multi-byte per cycle hardware data compression | — | 1999-07-27 |
| 5903230 | Apparatus for compressing data using a Lempel-Ziv-type algorithm | — | 1999-05-11 |
| 5870404 | Self-timed circuit having critical path timing detection | Frank D. Ferraiolo, John E. Gersbach, Norman J. Rohrer, Bruce W. Singer | 1999-02-09 |
| 5838205 | Variable-speed phase-locked loop system with on-the-fly switching and method therefor | Frank D. Ferraiolo, John E. Gersbach | 1998-11-17 |
| 5771010 | Apparatus for compressing data using a Lempel-Ziv-type algorithm | — | 1998-06-23 |
| 5771011 | Match detect logic for multi-byte per cycle hardware data compression | — | 1998-06-23 |
| 5757238 | Fast locking variable frequency phase-locked loop | Frank D. Ferraiolo, John E. Gersbach | 1998-05-26 |
| 5739725 | Digitally controlled oscillator circuit | Frank D. Ferraiolo, John E. Gersbach | 1998-04-14 |
| 5724008 | Phase-locked loop with charge distribution | Frank D. Ferraiolo, John E. Gersbach | 1998-03-03 |