Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9608632 | Resistance calibration method and related calibration system | Yao-Cheng Chuang | 2017-03-28 |
| 8531221 | Delay lock loop circuit and method | Tzu-Cheng Yang | 2013-09-10 |
| 7415089 | High-speed serial link clock and data recovery | Chau-Chin Su, Hung-Wen Lu, Hsueh-Chin Lin, Yen-Pin Tseng, Chia-Nan Wang +1 more | 2008-08-19 |