AF

Arnon Friedmann

AW Aware: 7 patents #20 of 80Top 25%
TD Tq Delta: 3 patents #11 of 15Top 75%
MA Maxtor: 1 patents #329 of 656Top 55%
QU Quantum: 1 patents #325 of 703Top 50%
TI Texas Instruments: 1 patents #7,357 of 12,488Top 60%
Overall (All Time): #352,019 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10419059 Systems and methods for implementing receiver transparent Q-mode Marcos C. Tzannes 2019-09-17
9191039 Randomization using an XOR scrambler in multicarrier communications Marcos C. Tzannes 2015-11-17
8792574 Systems and methods for implementing receiver transparent Q-mode Marcos C. Tzannes 2014-07-29
8335271 Systems and methods for implementing receiver transparent Q-mode Marcos C. Tzannes 2012-12-18
8102909 Systems and methods that provide frequency domain supplemental training of the time domain equalizer for DMT Stuart D. Sandberg, Jelena Jovin, Bindu Chandna 2012-01-24
7656976 Systems and methods for multicarrier modulation using multi-tap frequency-domain equalizer and decision feedback Richard W. Gross, Yan Yang, Mei Yong, Stuart D. Sandberg 2010-02-02
7636389 Systems and methods that provide frequency domain supplemental training of the time domain equalizer for DMT Stuart D. Sandberg, Jelena Jovin, Bindu Chandna 2009-12-22
7558329 Systems and methods for implementing receiver transparent Q-mode Marcos C. Tzannes 2009-07-07
7394875 Beaulieu series approach to optimal UMTS RACH preamble detection estimation Samuel J. MacMullan, Oguz Tanrikulu, Frank C. Livingston 2008-07-01
7180938 Systems and methods that provide frequency domain supplemental training of the time domain equalizer for DMT Stuart D. Sandberg, Jelena Jovin, Bindu Chandna 2007-02-20
6760373 Systems and methods for multicarrier modulation using multi-tap frequency-domain equalizer and decision feedback Richard W. Gross, Yan Yang, Mei Yong, Stuart D. Sandberg 2004-07-06
6731695 Systems and methods for implementing receiver transparent Q-mode Marcos C. Tzannes 2004-05-04
6557136 Method and system for limiting the maximum number of consecutive zeroes in a block for communications or storage 2003-04-29
6512644 Method and apparatus for read-after-write verification with error tolerance Dana Hall 2003-01-28