| 5467452 |
Routing control information via a bus selectively controls whether data should be routed through a switch or a bus according to number of destination processors |
Gottfried Goldrian, Wolfgang Kumpf |
1995-11-14 |
| 5319948 |
Low temperature generation process and expansion engine |
Manfred Schmidt |
1994-06-14 |
| 5164818 |
Removable VLSI assembly |
Frank Gerth, Manfred Perske, Manfred Schmidt |
1992-11-17 |
| 5078581 |
Cascade compressor |
Manfred Perske, Manfred Schmidt |
1992-01-07 |
| 4802062 |
Integrated wiring system for VLSI |
Marian Briska, Knut Najmann |
1989-01-31 |
| 4688222 |
Built-in parallel testing circuit for use in a processor |
— |
1987-08-18 |
| 4669079 |
Method and apparatus for bus arbitration in a data processing system |
— |
1987-05-26 |
| 4621363 |
Testing and diagnostic device for digital computers |
— |
1986-11-04 |
| 4604746 |
Testing and diagnostic device for digital computers |
— |
1986-08-05 |
| 4490673 |
Testing an integrated circuit containing a tristate driver and a control signal generating network therefor |
Helmut Schettler |
1984-12-25 |
| 4476431 |
Shift register latch circuit means contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniques and utilized at least in part for check and test purposes |
— |
1984-10-09 |
| 4428060 |
Shift register latch circuit means for check and test purposes and contained in LSI circuitry conforming to level sensitive scan design (LSSD) rules and techniques |
— |
1984-01-24 |
| 4419739 |
Decentralized generation of synchronized clock control signals having dynamically selectable periods |
— |
1983-12-06 |
| 4295220 |
Clock check circuits using delayed signals |
Hellmuth R. Geng, Hermann Schulze-Schoelling, Bernd Spaeth |
1981-10-13 |
| 4231085 |
Arrangement for micro instruction control |
Dieter Bazlen, Rolf Berger, Dietrich W. Bock, Herbert Chilinski, Hellmuth R. Geng +4 more |
1980-10-28 |
