Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12382658 | Reducing transistor breakdown in a power FET current sense stack | Henry Litzmann Edwards, Narayana Sateesh Pillai, Gangqiang Zhang | 2025-08-05 |
| 12323057 | System and method for adaptive gate drive current circuit | Rida Shawky Assaad, Gangqiang Zhang, Kae Ann Wong | 2025-06-03 |
| 11799422 | Oscillator with reduced temperature sensitivity | Muawiya Ali Al-Khalidi, Pinar Korkmaz, Paul David Curtis | 2023-10-24 |
| 11614499 | Methods and apparatus to improve detection of capacitors implemented for regulators | Siang Tong Tan, Gangqiang Zhang | 2023-03-28 |
| 11392158 | Low threshold voltage transistor bias circuit | Luis Ariel Malave-Perez | 2022-07-19 |
| 11217992 | High-speed short-to-ground protection circuit for pass field-effect transistor (FET) | Kae Ann Wong, Siang Tong Tan, Luis Ariel Malave-Perez, Mikko Topi Loikkanen, Mitsuyori Saito | 2022-01-04 |
| 10916653 | Transient-insensitive level shifter | Rida Shawky Assaad | 2021-02-09 |
| 10821922 | Power control system | George Vincent Konnail, Hasibur Rahman, Xiaochun Zhao, Artur J. Lewinski | 2020-11-03 |
| 10802517 | Multi-mode voltage regulator | Rida Shawky Assaad, Terry L. Mayhugh | 2020-10-13 |
| 10782727 | Integrated circuits having self-calibrating oscillators, and methods of operating the same | Pinar Korkmaz, Sujan Kundapur Manohar | 2020-09-22 |
| 10613564 | Adaptive body bias for voltage regulator | Sujan Kundapur Manohar, Ashish Khandelwal | 2020-04-07 |
| 10594215 | Circuits and methods to linearize conversion gain in a DC-DC converter | Sujan K. Manohar | 2020-03-17 |
| 10581416 | External and dual ramp clock synchronization | Junhong Zhang, Pinar Korkmaz, Sujan K. Manohar, Michael J. Munroe | 2020-03-03 |
| 10382028 | VDS comparator rise P, fall P, on late, off late outputs for ZVC timing | Jingwei Xu, Vijayalakshmi Devarajan, Gangqiang Zhang | 2019-08-13 |
| 10180694 | Adaptive body bias for voltage regulator | Sujan Kundapur Manohar, Ashish Khandelwal | 2019-01-15 |
| 10116294 | High-resolution FET VDS zero-volt-crossing timing detection scheme in a wireless power transfer system | Jingwei Xu, Vijayalakshmi Devarajan, Gangqiang Zhang | 2018-10-30 |
| 10103261 | Transient-insensitive level shifter | Rida Shawky Assaad | 2018-10-16 |
| 10014775 | Methods and apparatus for full gate drive of multilevel DC-DC converter with full duty cycle operation | Rida Shawky Assaad | 2018-07-03 |
| 10014774 | Power supply with low to high power transition mode | Gangqiang Zhang, Vaibhav Garg, Xiaochun Zhao, Vijayalakshmi Devarajan | 2018-07-03 |
| 9948181 | Circuits and methods to linearize conversion gain in a DC-DC converter | Sujan Kundapur Manohar | 2018-04-17 |
| 9065413 | Method and apparatus for circuit with low IC power dissipation and high dynamic range | Paul H. Fontaine, Michel Vercier, Chintan Trehan, Sooping Saw, Balaji Chellappa | 2015-06-23 |
| 7034603 | Floating-gate reference circuit | Philomena Cleopha Brady, Haw-Jing Lo, Guillermo Serrano, Farhan Adil, Matthew Raymond Kucic +2 more | 2006-04-25 |