Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7535113 | Reduced inductance in ball grid array packages | — | 2009-05-19 |
| 7420286 | Reduced inductance in ball grid array packages | — | 2008-09-02 |
| 6574108 | Selective PCB via location to enhance cooling | Mark R. Berg | 2003-06-03 |
| 6092226 | Fabrication of test logic for level sensitive scan on a circuit | Roger G. Brown, Eric Fischer | 2000-07-18 |