AH

Adnan Hamid

BS Breker Verification Systems: 15 patents #1 of 5Top 20%
AM AMD: 3 patents #3,141 of 9,279Top 35%
Overall (All Time): #219,854 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11748240 Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models Kairong Qian, Kieu Do, Joerg Grosse 2023-09-05
11113184 Display in a graphical format of test results generated using scenario models Kairong Qian, Kieu Do, Joerg Grosse 2021-09-07
11055212 Testing SoC with portable scenario models and at different levels Kairong Qian, Kieu Do, Joerg Grosse 2021-07-06
10838006 Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models Kairong Qian, Kieu Do, Joerg Grosse 2020-11-17
10429442 Testing SOC with portable scenario models and at different levels Kairong Qian, Kieu Do, Joerg Grosse 2019-10-01
10365326 Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models Kairong Qian, Kieu Do, Joerg Grosse 2019-07-30
9874608 Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models Kairong Qian, Kieu Do, Joerg Grosse 2018-01-23
9689921 Testing SoC with portable scenario models and at different levels Kairong Qian, Kieu Do, Joerg Grosse 2017-06-27
9651619 Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models Kairong Qian, Kieu Do, Joerg Grosse 2017-05-16
9360523 Display in a graphical format of test results generated using scenario models Kairong Qian, Kieu Do, Joerg Grosse 2016-06-07
9316689 Scheduling of scenario models for execution within different computer threads and scheduling of memory regions for use with the scenario models Kairong Qian, Kieu Do, Joerg Grosse 2016-04-19
9310433 Testing SOC with portable scenario models and at different levels Kairong Qian, Kieu Do, Joerg Grosse 2016-04-12
7849425 Generating self-checking test cases from a reduced case analysis graph using path inheritance Arthur D. Flatau 2010-12-07
7823100 Generating self-checking test cases from a reduced case analysis graph using path constraints Arthur D. Flatau 2010-10-26
7779374 Generating self-checking test cases from reduced case analysis graphs Arthur D. Flatau 2010-08-17
7360184 Method and apparatus for scenario search based random generation of functional test suites 2008-04-15
6968285 Method and apparatus for scenario search based random generation of functional test suites 2005-11-22
6195616 Method and apparatus for the functional verification of digital electronic systems David F. Reed 2001-02-27
5995915 Method and apparatus for the functional verification of digital electronic systems David F. Reed 1999-11-30
5655109 Automated cell characterization system 1997-08-05