KR

Kalapi Roy-Neogi

IN Intel: 1 patents #18,218 of 30,777Top 60%
📍 San Jose, CA: #22,480 of 32,062 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,500,071 of 4,157,543Top 85%
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Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6507938 Methods for improving the performance of VLSI layouts designed by a timing driven physical design tool Nanda Gopal 2003-01-14