| 12130744 |
Fine-grained multithreaded cores executing fused operations in multiple clock cycles |
Yosi Arbeli, Gil Israel Dogon |
2024-10-29 |
| 11630774 |
Preventing overwriting of shared memory line segments |
Eran Galil |
2023-04-18 |
| 11366717 |
Systems and methods for error correction |
Leonid Smolyansky, Boris Shulman |
2022-06-21 |
| 11327656 |
Accessing a dynamic memory module |
Boris Shulman, Leonid Smolyansky |
2022-05-10 |
| 11294815 |
Multiple multithreaded processors with shared data cache |
Yosi Arbeli, Gil Israel Dogon |
2022-04-05 |
| 10998023 |
Error correction coding in a dynamic memory module |
Boris Shulman, Leonid Smolyansky |
2021-05-04 |
| 10698694 |
Arithmetic logic unit |
Gil Israel Dogon, Yosi Arbeli |
2020-06-30 |
| 10318308 |
Arithmetic logic unit |
Gil Israel Dogon, Yosi Arbeli |
2019-06-11 |
| 10255232 |
Computer architecture with a hardware accumulator reset |
Gil Israel Dogon, Yosi Arbeli |
2019-04-09 |
| 9785609 |
Computer architecture with a hardware accumulator reset |
Gil Israel Dogon, Yosi Arbeli |
2017-10-10 |
| 9256480 |
Computer architecture with a hardware accumulator reset |
Gil Israel Dogon, Yosi Arbeli |
2016-02-09 |
| 8892853 |
Hardware to support looping code in an image processing system |
Gil Israel Dogon, Emmanuel Sixsou, Yosi Arbeli, Mois Navon, Roman Sajman |
2014-11-18 |