Issued Patents All Time
Showing 26–50 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10917251 | Apparatus and method for generating hybrid static/dynamic entropy physically unclonable function | Sudhir K. Satpathy, Sanu K. Mathew | 2021-02-09 |
| 10911063 | Adaptive speculative decoding | Sudhir K. Satpathy, Sanu K. Mathew | 2021-02-02 |
| 10825511 | Device, system, and method to change a consistency of behavior by a cell circuit | Vivek K. De, Sanu K. Mathew, Sudhir K. Satpathy, Raghavan Kumar | 2020-11-03 |
| 10797858 | Unified hardware accelerator for symmetric-key ciphers | Sanu K. Mathew, Sudhir K. Satpathy, Vinodh Gopal | 2020-10-06 |
| 10754619 | Self-calibrated von-neumann extractor | Sudhir K. Satpathy, Sanu K. Mathew, Raghavan Kumar | 2020-08-25 |
| 10755242 | Bitcoin mining hardware accelerator with optimized message digest and message scheduler datapath | Sudhir K. Satpathy, Sanu K. Mathew | 2020-08-25 |
| 10705842 | Hardware accelerators and methods for high-performance authenticated encryption | Sanu K. Mathew, Sudhir K. Satpathy, Vinodh Gopal | 2020-07-07 |
| 10694217 | Efficient length limiting of compression codes | Sudhir K. Satpathy, Vinodh Gopal, James D. Guilford, Sanu K. Mathew | 2020-06-23 |
| 10635404 | Mixed-coordinate point multiplication | Sudhir K. Satpathy, Raghavan Kumar, Arvind Singh, Sanu K. Mathew | 2020-04-28 |
| 10606765 | Composite field scaled affine transforms-based hardware accelerator | Sudhir K. Satpathy, Sanu K. Mathew | 2020-03-31 |
| 10579335 | Multiplier circuit for accelerated square operations | Sudhir K. Satpathy, Sanu K. Mathew, Raghavan Kumar | 2020-03-03 |
| 10579339 | Random number generator that includes physically unclonable circuits | Sanu K. Mathew, Sudhir K. Satpathy | 2020-03-03 |
| 10530588 | Multi-stage non-linearly cascaded physically unclonable function circuit | Sanu K. Mathew, Sudhir K. Satpathy | 2020-01-07 |
| 10498532 | Parallel computation techniques for accelerated cryptographic capabilities | Sudhir K. Satpathy, Raghavan Kumar, Sanu K. Mathew | 2019-12-03 |
| 10496373 | Unified integer and carry-less modular multiplier and a reduction circuit | Sanu K. Mathew, Sudhir K. Satpathy, Vinodh Gopal | 2019-12-03 |
| 10395035 | Photon emission attack resistance driver circuits | Sanu K. Mathew, Sudhir K. Satpathy, Patrick Koeberl | 2019-08-27 |
| 10346343 | Hardware accelerator for platform firmware integrity check | Sudhir K. Satpathy, Sanu K. Mathew, Neeraj Upasani | 2019-07-09 |
| 10326596 | Techniques for secure authentication | Sudhir K. Satpathy, Sanu K. Mathew | 2019-06-18 |
| 10313108 | Energy-efficient bitcoin mining hardware accelerators | Sudhir K. Satpathy, Sanu K. Mathew | 2019-06-04 |
| 10256973 | Linear masking circuits for side-channel immunization of advanced encryption standard hardware | Raghavan Kumar, Sanu K. Mathew, Avinash L. Varna, Sudhir K. Satpathy | 2019-04-09 |
| 10218497 | Hybrid AES-SMS4 hardware accelerator | Sudhir K. Satpathy, Sanu K. Mathew | 2019-02-26 |
| 10177782 | Hardware apparatuses and methods for data decompression | Sudhir K. Satpathy, James D. Guilford, Sanu K. Mathew, Vinodh Gopal | 2019-01-08 |
| 10164773 | Energy-efficient dual-rail keeperless domino datapath circuits | Sanu K. Mathew, Sudhir K. Satpathy | 2018-12-25 |
| 10142098 | Optimized SHA-256 datapath for energy-efficient high-performance Bitcoin mining | Sudhir K. Satpathy, Sanu K. Mathew | 2018-11-27 |
| 10129018 | Hybrid SM3 and SHA acceleration processors | Sudhir K. Satpathy, Sanu K. Mathew | 2018-11-13 |