Issued Patents All Time
Showing 26–50 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11218320 | Accelerators for post-quantum cryptography secure hash-based signing and verification | Vikram Suresh, Manoj Sastry, Santosh Ghosh, Raghavan Kumar, Rafael Misoczki | 2022-01-04 |
| 11205017 | Post quantum public key signature operation for reconfigurable circuit devices | Vikram Suresh, Rafael Misoczki, Santosh Ghosh, Raghavan Kumar, Manoj Sastry +1 more | 2021-12-21 |
| 11169799 | Instructions and logic to perform floating-point and integer operations for machine learning | Himanshu Kaul, Mark A. Anders, Anbang Yao, Joydeep Ray, Ping T. Tang +13 more | 2021-11-09 |
| 11126663 | Method and apparatus for energy efficient decompression using ordered tokens | Sudhir K. Satpathy, Vikram Suresh, Vinodh Gopal | 2021-09-21 |
| 11121856 | Unified AES-SMS4—Camellia symmetric key block cipher acceleration | Sudhir K. Satpathy, Vikram Suresh | 2021-09-14 |
| 11082241 | Physically unclonable function with feed-forward addressing and variable latency output | Manoj Sachdev, Vikram Suresh, Sudhir K. Satpathy | 2021-08-03 |
| 11080046 | Instructions and logic to perform floating point and integer operations for machine learning | Himanshu Kaul, Mark A. Anders, Anbang Yao, Joydeep Ray, Ping T. Tang +13 more | 2021-08-03 |
| 10985903 | Power side-channel attack resistant advanced encryption standard accelerator processor | Raghavan Kumar, Sudhir K. Satpathy, Vikram Suresh | 2021-04-20 |
| 10928847 | Apparatuses and methods for frequency scaling a message scheduler data path of a hashing accelerator | Vikram Suresh, Sudhir K. Satpathy | 2021-02-23 |
| 10917251 | Apparatus and method for generating hybrid static/dynamic entropy physically unclonable function | Sudhir K. Satpathy, Vikram Suresh | 2021-02-09 |
| 10911063 | Adaptive speculative decoding | Vikram Suresh, Sudhir K. Satpathy | 2021-02-02 |
| 10825511 | Device, system, and method to change a consistency of behavior by a cell circuit | Vivek K. De, Sudhir K. Satpathy, Vikram Suresh, Raghavan Kumar | 2020-11-03 |
| 10797858 | Unified hardware accelerator for symmetric-key ciphers | Vikram Suresh, Sudhir K. Satpathy, Vinodh Gopal | 2020-10-06 |
| 10763894 | Methods and apparatus to parallelize data decompression | Vinodh Gopal, James D. Guilford, Sudhir K. Satpathy | 2020-09-01 |
| 10755242 | Bitcoin mining hardware accelerator with optimized message digest and message scheduler datapath | Vikram Suresh, Sudhir K. Satpathy | 2020-08-25 |
| 10754619 | Self-calibrated von-neumann extractor | Sudhir K. Satpathy, Vikram Suresh, Raghavan Kumar | 2020-08-25 |
| 10705842 | Hardware accelerators and methods for high-performance authenticated encryption | Vikram Suresh, Sudhir K. Satpathy, Vinodh Gopal | 2020-07-07 |
| 10694217 | Efficient length limiting of compression codes | Sudhir K. Satpathy, Vinodh Gopal, James D. Guilford, Vikram Suresh | 2020-06-23 |
| 10635404 | Mixed-coordinate point multiplication | Sudhir K. Satpathy, Raghavan Kumar, Arvind Singh, Vikram Suresh | 2020-04-28 |
| 10606765 | Composite field scaled affine transforms-based hardware accelerator | Sudhir K. Satpathy, Vikram Suresh | 2020-03-31 |
| 10599429 | Variable format, variable sparsity matrix multiplication instruction | Mark A. Anders, Himanshu Kaul | 2020-03-24 |
| 10579339 | Random number generator that includes physically unclonable circuits | Vikram Suresh, Sudhir K. Satpathy | 2020-03-03 |
| 10579335 | Multiplier circuit for accelerated square operations | Sudhir K. Satpathy, Vikram Suresh, Raghavan Kumar | 2020-03-03 |
| 10530588 | Multi-stage non-linearly cascaded physically unclonable function circuit | Vikram Suresh, Sudhir K. Satpathy | 2020-01-07 |
| 10496373 | Unified integer and carry-less modular multiplier and a reduction circuit | Vikram Suresh, Sudhir K. Satpathy, Vinodh Gopal | 2019-12-03 |