Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11797343 | Data management for edge architectures | Francesc Guim Bernat, Karthik Kumar, Mark A. Schmisseur, Brinda Ganesh | 2023-10-24 |
| 11232127 | Technologies for providing dynamic persistence of data in edge computing | Francesc Guim Bernat, Karthik Kumar, Suraj Prabhakaran, Timothy Verrall, Ned M. Smith | 2022-01-25 |
| 11182298 | System, apparatus and method for dynamic profiling in a processor | — | 2021-11-23 |
| 11093287 | Data management for edge architectures | Francesc Guim Bernat, Karthik Kumar, Mark A. Schmisseur, Brinda Ganesh | 2021-08-17 |
| 11082525 | Technologies for managing sensor and telemetry data on an edge networking platform | Timothy Verrall, Ned M. Smith, Thomas Willhalm, Brinda Ganesh, Francesc Guim Bernat +11 more | 2021-08-03 |
| 11051026 | Method and system of frame re-ordering for video coding | Sumit Mohan, Changliang Wang, Hong Jiang, Jean-Pierre Giacalone | 2021-06-29 |
| 10474219 | Enabling system low power state when compute elements are active | Arojit Roychowdhury, Ajaya V. Durg, Rakesh A. Ughreja | 2019-11-12 |
| 10296464 | System, apparatus and method for dynamic profiling in a processor | — | 2019-05-21 |
| 10275853 | Media hub device and cache | Arojit Roychowdhury, Ajaya V. Durg, Rajeev D. Muralidhar | 2019-04-30 |
| 9432679 | Data processing system | Aleksandar Beric | 2016-08-30 |
| 9407926 | Block-based static region detection for video processing | Vladimir Kovacevic, Zdravko Pantic, Aleksandar Beric, Jean-Pierre Giacalone, Anton Veselov +1 more | 2016-08-02 |
| 8364935 | Data processing apparatus address range dependent parallelization of instructions | Balakrishnan Srinivasan, Carlos Antonio Alba Pinto, Harm Johannes Antonius Maria Peters, Rafael Peset Llopis | 2013-01-29 |
| 8339405 | Programmable data processing circuit | Carlos Antonio Alba Pinto | 2012-12-25 |
| 8009174 | Processing a data array with a meandering scanning order using a circular buffer memory | Aleksandar Beric | 2011-08-30 |
| 7861062 | Data processing device with instruction controlled clock speed | Carlos Antonio Alba Pinto, Balakrishnan Srinivasan | 2010-12-28 |
| 7797493 | Enhancing performance of a memory unit of a data processing device by separating reading and fetching functionalities | Harm Johannes Antonius Maria Peters, Gerard Veldman, Patrick Peter Elizabeth Meuwissen | 2010-09-14 |
| 7730284 | Pipelined instruction processor with data bypassing and disabling circuit | Balakrishnan Srinivasan, Carlos Antonio Alba Pinto | 2010-06-01 |
| 7664929 | Data processing apparatus with parallel operating functional units | Carlos Pinto, Srinivasan Balakrishnan, Harm Johannes Antonius Maria Peters, Rafael Peset Llopis | 2010-02-16 |
| 7457970 | VLIW processor with power saving | Carlos Antonio Alba Pinto, Balakrishnan Srinivasan, Harm Johannes Antonius Maria Peters, Rafael Peset Llopis | 2008-11-25 |