Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5215934 | Process for reducing program disturbance in EEPROM arrays | — | 1993-06-01 |
| 5199001 | Architecture for erasing very small areas of flash EPROMs | — | 1993-03-30 |
| 5111270 | Three-dimensional contactless non-volatile memory cell | — | 1992-05-05 |
| 5049515 | Method of making a three-dimensional memory cell with integral select transistor | — | 1991-09-17 |
| 4964080 | Three-dimensional memory cell with integral select transistor | — | 1990-10-16 |