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CRC update mechanism |
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Pipelined hash table with reduced collisions |
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2020-04-14 |
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2018-06-05 |
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Single-lane, twenty-five gigabit ethernet |
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Pseudo dual-port SRAM and a shared memory switch using multiple memory banks and a sideband memory |
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Duplicated double checking production rule set for fault-tolerant electronics |
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2007-11-27 |
