Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7480189 | Cross-coupled write circuit | Lawrence T. Clark | 2009-01-20 |
| 6944713 | Low power set associative cache | Lawrence T. Clark | 2005-09-13 |
| 6909651 | Method and apparatus for testing a CAM addressed cache | Lawrence T. Clark | 2005-06-21 |
| 6744655 | Method and apparatus for testing a CAM addressed cache | Lawrence T. Clark | 2004-06-01 |
| 6487131 | Method and apparatus for testing a CAM addressed cache | Lawrence T. Clark | 2002-11-26 |
| 6449694 | Low power cache operation through the use of partial tag comparison | Richard J. Burgess, Jr., Mark A. Schaecher | 2002-09-10 |
| 6434736 | Location based timing scheme in memory design | Mark A. Schaecher, Richard J. Burgess, Jr. | 2002-08-13 |