Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7185304 | System and method for VLSI CAD design | Gyorgy Suto, Kartik Gopal | 2007-02-27 |
| 5633805 | Logic synthesis having two-dimensional sizing progression for selecting gates from cell libraries | — | 1997-05-27 |
| 4247917 | MOS Random-access memory | Siu K. Tsang, William M. Holt | 1981-01-27 |