Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12081247 | Systems and methods for electronically scanned array antennas | Dan Pritsker, Colman Cheung | 2024-09-03 |
| 11902132 | Analog-to-digital converter or digital-to-analog converter data path with deterministic latency | Dan Pritsker, Colman Cheung | 2024-02-13 |
| 10489116 | Programmable integrated circuits with multiplexer and register pipelining circuitry | — | 2019-11-26 |
| 7987222 | Method and apparatus for implementing a multiplier utilizing digital signal processor block memory extension | Asher Hazanchuk | 2011-07-26 |
| 7949699 | Implementation of decimation filter in integrated circuit device using ram-based data storage | Hong Shan Neoh | 2011-05-24 |
| 7932761 | Fine tuned pulse width modulation | — | 2011-04-26 |
| 7864080 | Sample rate conversion by controlled selection of filter outputs | Suleyman Sirri Demirsoy, Lawrence Rigby | 2011-01-04 |
| 7793013 | High-speed FIR filters in FPGAs | — | 2010-09-07 |
| 7613760 | Efficient implementation of multi-channel integrators and differentiators in a programmable device | David J. Moore | 2009-11-03 |
| 7598790 | Clock synthesis using polyphase numerically controlled oscillator | Hong Shan Neoh | 2009-10-06 |
| 7570120 | Multichannel memory-based numerically controlled oscillators | — | 2009-08-04 |
| 7509562 | Maintaining data integrity for extended drop outs across high-speed serial links | Christopher Cook | 2009-03-24 |
| 7356554 | Variable fixed multipliers using memory blocks | Asher Hazanchuk | 2008-04-08 |
| 7269617 | Hybrid multipliers implemented using DSP circuitry and programmable logic circuitry | Robert Landon Pelt | 2007-09-11 |
| 6943579 | Variable fixed multipliers using memory blocks | Asher Hazanchuk | 2005-09-13 |