Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 10754413 | Mechanism to enter or exit retention level voltage while a system-on-a-chip is in low power mode | Vasudev Bibikar, Chin Seng Lu, Moorthy Rajesh, Darren Crews | 2020-08-25 | $27,661,000 |
| 10261572 | Technologies for managing power during an activation cycle | Arvind Raman | 2019-04-16 | $24,207,000 |
| 9625984 | Technologies for managing power during an activation cycle | Arvind Raman | 2017-04-18 | $8,310,000 |