WD

William L. Devanney

IT Integrated Device Technology: 5 patents #128 of 758Top 20%
CL Clearlogic: 3 patents #3 of 9Top 35%
Overall (All Time): #663,059 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
6763406 Noise reduction system and method for reducing switching noise in an interface to a large width bus Robert J. Proebsting 2004-07-13
6311316 Designing integrated circuit gate arrays using programmable logic device bitstreams Alan H. Huggins, David E. Schmulian, John MacPherson 2001-10-30
6243779 Noise reduction system and method for reducing switching noise in an interface to a large width bus Robert J. Proebsting 2001-06-05
6225652 Vertical laser fuse structure allowing increased packing density 2001-05-01
6191641 Zero power fuse circuit using subthreshold conduction 2001-02-20
5910922 Method for testing data retention in a static random access memory using isolated V.sub.cc supply Alan H. Huggins, Chuen-Der Lien 1999-06-08
5541883 Method and apparatus for simultaneous long writes of multiple cells of a row in a static ram 1996-07-30
5440524 Method and apparatus for simuilataneous long writes of multiple cells of a row in a static ram 1995-08-08