Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5663910 | Interleaving architecture and method for a high density FIFO | Ray-Jane Ko, Joseph P. Chiang | 1997-09-02 |
| 5546347 | Interleaving architecture and method for a high density FIFO | Ray-Jane Ko, Joseph P. Chiang | 1996-08-13 |
| 5471583 | FIFO buffer having write counter for generating empty flag value to be compared with read pointer value to indicate the buffer is full | Einat Yogev | 1995-11-28 |
| 5325487 | Shadow pipeline architecture in FIFO buffer | Einat Yogev | 1994-06-28 |