Issued Patents All Time
Showing 26–44 of 44 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6789150 | Integrated circuit having arbitrated switching between busses | — | 2004-09-07 |
| 6768668 | Converting volatile memory to non-volatile memory | — | 2004-07-27 |
| 6711081 | Refreshing of multi-port memory in integrated circuits | — | 2004-03-23 |
| 6704232 | Performance for ICs with memory cells | — | 2004-03-09 |
| 6628541 | Memory architecture with refresh and sense amplifiers | — | 2003-09-30 |
| 6628551 | Reducing leakage current in memory cells | — | 2003-09-30 |
| 6621304 | Clocking and synchronization circuitry | — | 2003-09-16 |
| 6621752 | Refreshing scheme for memory cells a memory array to increase performance of integrated circuits | — | 2003-09-16 |
| 6549451 | Memory cell having reduced leakage current | — | 2003-04-15 |
| 6545905 | Multi-port memory cell with refresh port | — | 2003-04-08 |
| 6510075 | Memory cell with increased capacitance | — | 2003-01-21 |
| 6487107 | Retention time of memory cells by reducing leakage current | — | 2002-11-26 |
| 6469924 | Memory architecture with refresh and sense amplifiers | — | 2002-10-22 |
| 6469925 | Memory cell with improved retention time | — | 2002-10-22 |
| 6310810 | High-speed sense amplifier | — | 2001-10-30 |
| 6304478 | Layout for a semiconductor memory | — | 2001-10-16 |
| 5805577 | Erica: explicit rate indication for congestion avoidance in ATM networks | Rohit Goyal, Shiv Kalyanaraman, Ram Viswanathan, Sonia Fahmy | 1998-09-08 |
| 5633859 | Method and apparatus for congestion management in computer networks using explicit rate indication | Shiv Kalyanaraman, Ram Viswanathan | 1997-05-27 |
| 5322573 | InP solar cell with window layer | Geoffrey A. Landis | 1994-06-21 |