Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8122320 | Integrated circuit including an ECC error counter | Peter Chlumecky | 2012-02-21 |
| 7940582 | Integrated circuit that stores defective memory cell addresses | — | 2011-05-10 |
| 7872931 | Integrated circuit with control circuit for performing retention test | — | 2011-01-18 |
| 7773438 | Integrated circuit that stores first and second defective memory cell addresses | — | 2010-08-10 |
| 7362633 | Parallel read for front end compression mode | — | 2008-04-22 |
| 7230858 | Dual frequency first-in-first-out structure | Skip Shizhen Liu, Peter Chlumecky | 2007-06-12 |
| 7164613 | Flexible internal address counting method and apparatus | Wolfgang Hokenmaier, Klaus Hummler | 2007-01-16 |
| 7123542 | Memory having internal column counter for compression test mode | Johann Pfeiffer | 2006-10-17 |