Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11620243 | Way partitioning for a system-level cache | Vinod Chamarty, Xiaoyu Ma, Keith Robert Pflederer, Weiping Liao, Benjamin K. Dodge +5 more | 2023-04-04 |
| 10924117 | Method for designing an FPGA | Jeongbin Kim, Kitae Kim, Kyungseon Cho, Seungjin Lee, Daehyung CHO +1 more | 2021-02-16 |
| 10884959 | Way partitioning for a system-level cache | Vinod Chamarty, Xiaoyu Ma, Keith Robert Pflederer, Weiping Liao, Benjamin K. Dodge +5 more | 2021-01-05 |
| 10650874 | Magnetic memory device with enhanced write performance and operation method thereof | Sachin Pathak, Kangwook Jo, Jongil Hong | 2020-05-12 |
| 10615801 | Technology mapping method of an FPGA | Kangwook Jo, Jeongbin Kim, Minyoung Im, Taehee You, Eui-Young Chung | 2020-04-07 |
| 10419001 | Look up table including magnetic element, FPGA including the look up table, and technology mapping method of the FPGA | Kangwook Jo, Jeongbin Kim, Minyoung Im, Taehee You, Eui-Young Chung | 2019-09-17 |
| 10419000 | Look up table including a nonvolatile memory element, FPGA including the look up table, and method for designing the FPGA | Jeongbin Kim, Kitae Kim, Kyungseon Cho, Seungjin Lee, Daehyung CHO +1 more | 2019-09-17 |
| 10290339 | Operating method of a magnetic memory device | Kangwook Jo, Jongil Hong | 2019-05-14 |
| 10089240 | Cache accessed using virtual addresses | Gurindar S. Sohi | 2018-10-02 |
| 9875782 | Magnetic memory device and operating method thereof | Kangwook Jo, Jongil Hong | 2018-01-23 |
| 9223717 | Computer cache system providing multi-line invalidation messages | Gurindar S. Sohi | 2015-12-29 |