Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5126966 | High speed logic simulation system with stimulus engine using independent event channels selectively driven by independent stimulus programs | William B. Fazakerly, William Loesch | 1992-06-30 |
| 4787061 | Dual delay mode pipelined logic simulator | Chu-Ching Nei, William B. Fazakerly | 1988-11-22 |
| 4787062 | Glitch detection by forcing the output of a simulated logic device to an undefined state | Chu-Ching Nei, William B. Fazakerly | 1988-11-22 |