Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9239795 | Efficient cache management in a tiled architecture | Mukesh Chand Agarwal | 2016-01-19 |
| 8477896 | Structure for window comparator circuit for clock data recovery from bipolar RZ data | Santoshkumar Jinagar, Animesh Khare, Ravi Lakshmipathy, Umesh K. Shukla, Pradeep K. Vanama | 2013-07-02 |
| 8132133 | Automated isolation of logic and macro blocks in chip design testing | Animesh Khare | 2012-03-06 |